Draft, not yet released. In stewardship review. Not indexed until the first approved release.

Risks and capability

Four semiconductor and compute risk objects open the portfolio. Order carries no rank. Each is read across driver, exposure, vulnerability, capacity, cascade and consequence.

6 min read0 figures1 table17 notesNR-XTECH-SEMICONDUCTORS-GLOBAL-2026-BASELINE

Contents
  1. ·Edition home
  2. ·Executive summary
  3. 1AI compute is physical infrastructure built on a few chips and a few places
  4. 2Key findings
  5. 3Systems and sectors at baseline
  6. 4Risks and capability
    1. 4.1 Risk objects
    2. 4.2 Capability ladder
  7. 5Compute build-out meets local power, water and packaging limits
  8. 6Readings from the other desks
  9. 7The 2027 agenda
  10. 8Systems in depth
  11. AMethodology
  12. BData appendix
  13. CReferences and record
  14. ·Complete edition, for print

4.1Risk objects

Each risk is read across the chain from hazard to consequence, with its status and evidence-quality level.

  1. InferredEQL 3RSK-XT06-ENE-001

    Power limits on the compute build-out

    Driver
    rapid growth in AI compute and data centre load1315
    Exposure
    regions with fast load growth; local grids
    Vulnerability
    interconnection queues; single-site clusters
    Capacity
    efficiency gains and siting choices57
    Cascade
    ENE → INF → FIN
    Horizon
    1 to 5 years

  2. InferredEQL 3RSK-XT06-INF-002

    Fabrication and packaging concentration

    Driver
    one foundry near 70% of the market; Taiwan equipment spending up 90%922
    Exposure
    chip supply for compute, memory and devices
    Vulnerability
    few sites; seismic and geopolitical exposure
    Capacity
    new plants under the US, EU and national programmes441221
    Cascade
    INF → AIC → FIN
    Horizon
    1 to 10 years

  3. InferredEQL 3RSK-XT06-TRD-003

    Fragmented export controls and licensing

    Driver
    US guidance and rescission of the diffusion rule1331
    Exposure
    equipment and chip flows; research collaboration
    Vulnerability
    rule changes at short notice
    Capacity
    licensing channels; allied coordination41
    Cascade
    TRD → INF, FIN
    Horizon
    1 to 5 years

  4. Expert inputEQL 2RSK-XT06-WAT-004

    Water siting limits for plants and cooling

    Driver
    plant expansion in water-scarce regions23
    Exposure
    plants and data centres in dry regions
    Vulnerability
    drought; competing municipal demand
    Capacity
    reclamation; company goal of 90% in one plan23
    Cascade
    WAT → INF → ENE
    Horizon
    1 to 5 years

4.2Capability ladder

Existence is not readiness. Each of the fifteen capability functions is placed on the ladder by the strongest public evidence for semiconductor and compute at the global level.

Table 4.1Capabilities on the ladder of evidence: listed, exists, demonstrated, tested
FunctionRungLevelStrongest public evidence at baseline
Prevention and mitigationLISTEDefficiency work exists; no common footprint standard bound57
Monitoring and observationEXISTSsales and equipment statistics published regularly89
Early warningLISTEDno consolidated shortage warning across chips, memory and packaging
Preparedness and planningEXISTSCHIPS Act and EU Chips Act programmes4412
Redundancy and reservesLISTEDstrategic stocks of chips and materials are not documented here
ResponseEXISTSEU monitoring and crisis response pillar in the Chips Act12
Continuity of critical servicesLISTEDnot tested in a documented chip shortage here
RecoveryLISTEDno documented recovery plan for a fabrication outage
AdaptationLISTEDroadmaps exist; adaptation of designs to supply limits not documented14
Social protectionLISTEDnot applicable at baseline
Finance and insuranceEXISTSpublic programmes of USD 50 billion in the US and EU State aid4412
Institutional coordinationEXISTSEuropean Semiconductor Board; IRDS roadmap1214
Technical infrastructureEXISTSfabrication and equipment base at USD 135.1 billion of billings9
WorkforceLISTEDskills gaps reported; no figure bound
Research capacityADEQUATEstrong peer-reviewed base127
A capability listed in policy is not a tested one; each rung is the strongest public evidence at baseline.

Notes

Numbers are the edition’s reference numbers, so a note reads the same in every chapter. The full list, with every source and its licence, is in Annex C. Annex C, references

  1. 1Pilz, K.F., Sanders, J., Rahman, R. and Heim, L., Trends in AI Supercomputers, arXiv:2504.16026, submitted 22 April 2025 (abstract page: 500 systems from 2019 to 2025; performance doubling about every nine months; cost and power doubling about every year; one March 2025 system with about 200,000 chips, USD 7 billion and 300 MW; about 75% of performance in the United States). arXiv, Ithaca. Observation year 2025. Accessed 2026-11-03.back
  2. 3Sevilla, J. and others, Can AI scaling continue through 2030?, Epoch AI, 20 August 2024 (first 100,000 characters read: about 4 times a year; 1 to 5 GW campuses; about 2e29 FLOP feasible by 2030; power binds first). Epoch AI, San Francisco. Observation year 2024. Accessed 2026-11-03.back
  3. 15US Department of Energy (ed.), DOE Releases New Report Evaluating Increase in Electricity Demand from Data Centers, 20 December 2024 (176 TWh in 2023, about 4.4%; 325 to 580 TWh, about 6.7% to 12%, in 2028). US Department of Energy, Washington. Observation year 2023. Accessed 2026-11-03.back
  4. 5Stanford Institute for Human-Centered AI (ed.), The 2025 AI Index Report, key takeaways page (training compute doubling about every five months; hardware cost down about 30% a year; energy efficiency up about 40% a year; chips detail not given on the page). Stanford University, Stanford. Observation year 2025. Accessed 2026-11-03.back
  5. 7Patterson, D. and others, Carbon Emissions and Large Neural Network Training, arXiv:2104.10350, April 2021 (abstract page: sparse models under one tenth of the energy; location effect 5 to 10 times; choice of model, datacentre and processor 100 to 1000 times). arXiv, Ithaca. Observation year 2021. Accessed 2026-11-03.back
  6. 9Evertiq (ed.), Semiconductor equipment billings reached $135B in 2025, 9 April 2026, a trade report of a SEMI release (USD 135.06 billion in 2025 against USD 117.14 billion in 2024; regional table); the SEMI page itself returned an access error, so this is a secondary report and weak evidence. Evertiq, Munich. Observation year 2025. Accessed 2026-11-03.back
  7. 22Focus Taiwan, Central News Agency (ed.), report of 13 March 2026 on the largest foundry reaching almost 70% of the global foundry market in 2025 (headline and lead only; the rest is behind a paywall); press report, weak evidence. Central News Agency, Taipei. Observation year 2025. Accessed 2026-11-03.back
  8. 44United States Congress, CHIPS and Science Act, Public Law 117-167, enacted 9 August 2022 (text of section 102 on Congress.gov, first 100,000 characters read: the funding lines for sections 9902 and 9906 of Public Law 116-283 by fiscal year 2022 to 2026 sum to USD 39 billion for manufacturing incentives and USD 11 billion for research, USD 50 billion in all; the totals are sums of the listed amounts, not stated in the text). Observation year 2022. Accessed 2026-11-03.back
  9. 12European Commission (ed.), European Chips Act policy page (entered into force 21 September 2023; three pillars; more than EUR 33 billion across 19 State aid decisions; second Chips Act proposed June 2026). Directorate-General for Communications Networks, Content and Technology, Brussels. Observation year 2026. Accessed 2026-11-03.back
  10. 21The Register (ed.), Japan’s Rapidus lands $1.7B to chase 2nm chip production by 2027, 27 February 2026 (JPY 267.6 billion round; JPY 100 billion from a METI agency; JPY 167.6 billion from 32 companies); trade press, weak evidence. Situation Publishing, London. Observation year 2026. Accessed 2026-11-03.back
  11. 13US Department of Commerce, Bureau of Industry and Security (ed.), home page and news items (May 2026 guidance on licences for advanced computing items to Country Group D:5 entities; 7 April 2026 extension of the authorised IC designer timeline to 31 December 2026; Section 232 investigation of semiconductor imports listed). BIS, Washington. Observation year 2026. Accessed 2026-11-03.back
  12. 31UNVERIFIED, not opened: law-firm client alerts on the rescission of the AI diffusion rule and related guidance, 12 and 13 May 2025, taken from search-result summaries; a formal notice date was not confirmed. Observation year 2025. Accessed 2026-11-03.back
  13. 41UNVERIFIED, not opened: Government of the Netherlands and Government of Japan, export-control rules on advanced semiconductor manufacturing equipment, 2023, cited from memory; no figure is used. Observation year 2023. Accessed 2026-11-03.back
  14. 23AZFamily (ed.), TSMC Arizona expansion could make it Phoenix’s largest water customer, 22 July 2026 (total planned investment USD 265 billion; about 5,300 acre-feet a year for the first fab; 65% reclaimed; goal 90%); local news reporting company figures, weak evidence. Gray Media, Phoenix. Observation year 2026. Accessed 2026-11-03.back
  15. 8Semiconductor Industry Association (ed.), Global Annual Semiconductor Sales Increase 25.6% to $791.7 Billion in 2025 (release; WSTS data; logic USD 301.9 billion; memory USD 223.1 billion; regional growth; about USD 1 trillion projected for 2026). Semiconductor Industry Association, Washington. Observation year 2025. Accessed 2026-11-03.back
  16. 14IEEE (ed.), International Roadmap for Devices and Systems, programme page (successor to the ITRS; IEEE sponsorship since 2016; 2023 update the latest edition listed). Institute of Electrical and Electronics Engineers, New York. Observation year 2023. Accessed 2026-11-03.back
  17. 2Sevilla, J., Heim, L., Ho, A., Besiroglu, T., Hobbhahn, M. and Villalobos, P., Compute Trends Across Three Eras of Machine Learning, arXiv:2202.05924, 2022 (abstract page: doubling about every 20 months before 2010 and about every 6 months in the deep learning era). arXiv, Ithaca. Observation year 2022. Accessed 2026-11-03.back

Cite this chapter

Valadbaygi, S. (Ed.). (2026). Chapter 4: Risks and capability. In Exponential Technology Report 2026: Advanced Semiconductors and AI Compute (Baseline Edition 2026, Report No. NR-XTECH-SEMICONDUCTORS-GLOBAL-2026-BASELINE) [Draft under review]. The Global Centre for Risk and Innovation (GCRI).

Every citation form of the whole report, BibTeX and RIS included, is on the edition home. Cite this report

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